Staff Engineer Design System
Infineon Technologies AG (company site, opens in a new tab)BengaluruOn-siteDirect career pageEst. 30–50 LPA
Posted 19h ago
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Job description
Structured overview of role & requirements
About This Role
- Develop and maintain SystemC/TLM 2.0 models and QEMU-based virtual prototypes for SoC and system validation.
- Own architecture, design, and simulation solutions using industry-standard ESL tools such as Synopsys Virtualizer, ASTC, VLAB.
- Analyze requirements and create both high-level and low-level SystemC model designs to accelerate virtual prototyping.
Minimum Requirements
- Proficient in C++, SystemC, TLM 2.0 on Windows and Linux platforms.
- Experience with ESL tools like Synopsys Virtualizer, ASTC, VLAB and development on Visual Studio or g++.
- Experience with verification methods including standalone SystemC unit verification, RTL co-simulation, and SW system testing.
- Work Experience Required: Not explicitly mentioned in the JD.
Ideal Candidate Profile
- Experienced in embedded system test development using C/C++ with automated debugging tools (e.g. PLS, Lauterbach T32).
- Familiar with embedded compilers such as GNU and Tasking, and system-level virtual prototype solutions.
- Has background in machine learning and deep learning algorithms with ability to implement scalable AI systems.