Staff CAD Layout Automation and Methodology Engineer
Renesas Electronics Corporation (company site, opens in a new tab)BengaluruOn-siteDirect career pageEst. 25–45 LPA
Posted 3h ago
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Job description
Structured overview of role & requirements
About This Role
- Develop, integrate, maintain, and deploy PDK Physical Design components and methodologies for Analog, Mixed-Signal, and Digital design teams across technology nodes.
- Define and maintain physical-design methodologies, configurations, and customization for technology and product-specific requirements.
- Collaborate with foundries, EDA vendors, and design teams to translate foundry technology requirements into robust PDK Physical Design flows and solutions.
Minimum Requirements
- Educational background in Electrical/Electronics Engineering, Semiconductor Physics, or related discipline.
- Experience in developing, integrating, and maintaining tools and flows for Physical design using Cadence Virtuoso environment.
- Proficiency in Cadence SKILL programming, Python, Perl scripting and UNIX/Linux environments.
- Work Experience Required: Not explicitly mentioned in the JD
Ideal Candidate Profile
- Strong understanding of IC physical design and layout methodologies, including chip-level integration and Tape-Out considerations.
- Experience in automation and productivity tool development to support design teams.
- Experienced collaborator with foundries, EDA vendors, CAD/EDA and IC design teams, able to interpret technology documentation into effective design flows.