Senior Staff Digital Verification Engineer
MaxLinear, Inc. (company site, opens in a new tab)7+ yrsOn-siteDirect career pageEst. 20–40 LPA
Posted 11h ago
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Job description
Structured overview of role & requirements
About This Role
- Architect and lead digital verification strategy for complex Analog Mixed-Signal (AMS) products, including power management and interface solutions.
- Ensure first-silicon success by applying robust verification methodologies and comprehensive coverage at block and full-chip levels.
- Collaborate closely with design and system teams to debug RTL and gate-level simulations and support test pattern conversion and ATE vector bring-up.
Minimum Requirements
- Bachelor’s or Master’s degree in Electrical/Electronics Engineering.
- 7+ years of experience in digital verification for ASICs, including block and full-chip verification using HVLs (UVM) and constrained random techniques.
- Experience with serial interface systems (USB controller, USB-UART, USB-Ethernet), power management, embedded microcontroller design, and SOCs with embedded CPUs.
- Proficiency in scripting languages such as Perl or Python for automation and acceleration of verification tasks.
Ideal Candidate Profile
- Experienced in architecting verification environments for SOCs with mixed-signal interfaces and complex serial communication protocols.
- Strong analytical skills with experience debugging RTL/gate simulations and collaborating with cross-functional engineering teams.
- Experienced in verification for power management ICs and serial interface systems in industrial and multi-market applications.