Verification Engineer
Intel Corporation (company site, opens in a new tab)6+ yrsBengaluruOn-siteDirect career pageEst. 22–40 LPA
Posted 7h ago
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Job description
Structured overview of role & requirements
About This Role
- Define and implement scalable and reusable verification strategies, test benches, and environments for ASIC blocks, subsystems, and SoCs to meet coverage and microarchitecture specifications.
- Lead detailed test planning, verification execution, bug investigation, and collaborate with multiple teams to resolve design issues pre-silicon.
- Continuously improve verification methodologies and infrastructure, and mentor junior engineers to support career and skill development.
Minimum Requirements
- Bachelor's degree in electrical engineering, computer engineering, computer science, or related STEM field.
- Minimum 6+ years of ASIC/FPGA design verification experience.
- Strong expertise in SystemVerilog/UVM or similar verification methodologies, coverage-driven verification, constrained-random testing, and use of simulators like Synopsys VCS or Cadence Xcelium.
- Experience with industry protocols such as AMBA AXI/AXI-S/CHI, UART, SPI, I2C/I3C, and scripting languages.
Ideal Candidate Profile
- Experienced in architecting verification strategies for complex ASICs with leadership in execution and closure of verification plans.
- Skilled in cross-functional collaboration with architects, RTL developers, post-silicon and physical design teams to ensure thorough validation of microarchitectural features.
- Proven ability to enhance verification methodologies and mentor junior engineers, indicating a strategic and developmental focus within ASIC design verification.