Post Silicon Validation Engineer/Lead
UST (company site, opens in a new tab)6–9 yrsBengaluruOn-siteDirect career pageEst. 12–20 LPA
Posted 1d ago
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Job description
Structured overview of role & requirements
About This Role
- Own system-level validation on bare-metal platforms, covering Security, Multimedia, Power, CPU, and OS domains to ensure platform stability and performance.
- Develop, modify, and execute test cases adapting to specification changes and new features, and deliver detailed failure analysis and reporting.
- Lead defect triage and debugging activities by analyzing root causes and collaborating with cross-functional teams to resolve issues and improve platform quality.
Minimum Requirements
- 6 to 9 years of experience in system validation, platform validation, firmware validation, or embedded systems testing.
- Engineering degree in Electronics and Communication Engineering, Electrical Engineering, Computer Science, or related discipline.
- Proficiency with system-level validation on bare-metal platforms; strong debugging, defect-triage, and test development skills.
- Proficiency in C/C++/Python scripting, familiarity with hardware/software interaction, validation tools, test automation frameworks, and defect-tracking systems.
Ideal Candidate Profile
- Experienced in low-level system validation with strong command over CPU architecture, power management, security, multimedia, and OS validation concepts on bare-metal platforms.
- Demonstrates independent problem-solving abilities in a fast-paced engineering environment, capable of handling technical failures and root cause analysis autonomously.
- Preferably has exposure to Qualcomm Snapdragon or comparable SoC platforms and familiarity with ARM architecture, firmware testing, board bring-up, and debugging tools such as JTAG or Lauterbach TRACE32.