Staff CAD Engineer (Power Signal Integrity)
Marvell Technology, Inc. (company site, opens in a new tab)5+ yrsBengaluruOn-siteDirect career pageEst. 25–40 LPA
Posted 5h ago
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Job description
Structured overview of role & requirements
About This Role
- Own and develop Power Signal Integrity (PSI) signoff methodologies including static and dynamic IR/EM analysis at block and full-chip levels for advanced technology nodes (7nm, 5nm, 3nm).
- Drive automation of IR/EM flow execution and reporting using Tcl and Python scripting, and support tapeout activities ensuring signoff closure.
- Collaborate with EDA vendors to evaluate and improve PSI tools and methodologies, and contribute to knowledge sharing and training across global teams.
Minimum Requirements
- B.E./B.Tech or M.E./M.Tech in Electrical Engineering, Electronics Engineering, Computer Science, or related field.
- 5+ years of hands-on experience with Cadence Voltus for IR drop and EM analysis in production ASIC/SoC flows.
- Proven experience in block-level and full-chip PSI signoff on advanced nodes (7nm, 5nm, or 3nm).
- Work Experience Required: 5+ years
Ideal Candidate Profile
- Experienced in static and dynamic power and IR analysis methodologies with hierarchical flow understanding.
- Skilled in scripting automation (Tcl, Python) for IR/EM CAD flows in complex semiconductor design environments.
- Comfortable interfacing with EDA vendors and working cross-functionally to drive tool and methodology improvements on cutting-edge technologies.