Senior Staff / Principal Engineer, AMS Verification
Renesas Electronics Corporation (company site, opens in a new tab)10+ yrsBengaluruOn-siteDirect career pageEst. 30–50 LPA
Posted 1h ago
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Job description
Structured overview of role & requirements
About This Role
- Own and lead block-level and full-chip digital verification for power, analog, and mixed-signal ICs including architecture, methodology, execution, and sign-off.
- Develop scalable SystemVerilog/UVM verification environments, verification plans, and coverage strategies from specifications.
- Mentor verification engineers and provide technical leadership including root-cause analysis, methodology improvements, and risk assessment.
Minimum Requirements
- Bachelor's or Master's degree in Electrical, Electronics, Computer Engineering, or related field.
- 10+ years of hands-on experience in AMS verification with SystemVerilog and UVM.
- Proven ownership of complex block and full-chip verification environments and sign-off for semiconductor products.
- Experience with digital logic verification in power-management, automotive, audio, or mixed-signal ICs; plus knowledge of RTL, low-power states, serial interfaces, DFT, and scripting (Python, TCL, Perl, shell).
Ideal Candidate Profile
- Experienced individual contributor with deep expertise in AMS verification including functional, assertion-based, and formal verification methodologies.
- Demonstrates ability to establish and own verification flows from scratch and influence design through early identification of verification and product risks.
- Proven mentor and technical leader able to drive reusable verification methodology and collaborate cross-functionally without formal management authority.