Silicon Design Verification Engineer
Intel Corporation (company site, opens in a new tab)5+ yrsBengaluruOn-siteDirect career pageEst. 20–40 LPA
Posted 6h ago
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Job description
Structured overview of role & requirements
About This Role
- Validate design-for-test (DFx) features such as Scan, SBFT, TAP, Arrays, Fuse, MBIST using simulation and emulation tools.
- Create and execute validation plans for complex microarchitecture components based on specs and RTL code; debug failures to root causes across simulation and silicon.
- Develop and utilize test and debug tools, engage with IP providers and customers to improve IP development and SoC integration efficiency and quality.
Minimum Requirements
- Bachelor's degree plus 5 years or Master's degree plus 3 years in Computer Science, Computer Engineering, or Electrical Engineering.
- Minimum 3 years experience with reading and interpreting technical specs and RTL code (Verilog/SystemVerilog/OVM/UVM).
- Minimum 3 years experience in IP or SoC development, verification, or integration with emphasis on validation plan creation and execution.
- Minimum 1 year experience with UNIX or Linux environments.
Ideal Candidate Profile
- Experienced in silicon design team environment with 2+ years of validation or testing on complex SoCs or IPs.
- Familiarity with industry standards such as Scan, JTAG, BScan, and background in computer architecture or IA-32 assembly programming.
- Comfortable working under structured validation methodologies and debugging complex microarchitecture failures leveraging both software tools and hardware emulation/silicon.