Senior Staff, Emulation Engineer
Marvell Technology, Inc. (company site, opens in a new tab)7+ yrsBengaluruOn-siteDirect career pageEst. 22–40 LPA
Posted 10h ago
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Job description
Structured overview of role & requirements
About This Role
- Own emulation model development, test execution, and system-level debug across SoC emulation platforms like Palladium, Veloce, and Zebu for connectivity silicon programs.
- Collaborate cross-functionally with design, validation, firmware, software, and vendors to enable early firmware bring-up, hardware/software co-validation, and risk reduction before silicon tape-out.
- Develop and maintain HW/SW enablement flows, automation scripts, and infrastructure to improve emulation environment productivity, reliability, and validation coverage.
Minimum Requirements
- Bachelor's degree in Electrical/Computer Engineering or Computer Science (Master's/PhD with 3+ years also accepted).
- 7+ years relevant experience (or 3+ years with Master's/PhD).
- Hands-on experience with SoC emulation platforms (Palladium, Veloce, Zebu) and emulation model building for SoC designs.
- Experience with Verilog/SystemVerilog test planning, simulation, debug, and scripting/automation using Python, Perl, Tcl, or UNIX shell.
Ideal Candidate Profile
- Experience with emulation of networking devices or mixed-signal designs involving PHY or Layer-2/Layer-3 functionality.
- Familiarity with connectivity silicon such as Optical DSPs, High-speed Ethernet PHYs, and AEC/AOC enablement devices.
- Proven ability to collaborate effectively with design, validation, firmware teams and vendors, and contribute to improving emulation infrastructure in complex SoC projects.