Peripherals (Ethernet) Validation Engineer – Staff/ Sr. Lead / Senior Engineer
Qualcomm Incorporated (company site, opens in a new tab)4+ yrsBengaluruOn-siteDirect career pageEst. 20–40 LPA
Posted 20h ago
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Job description
Structured overview of role & requirements
About This Role
- Develop and maintain comprehensive validation plans for Ethernet IP and SoC-level features in pre-silicon, emulation, and post-silicon environments.
- Lead bring-up, debug, and root-cause analysis for complex multi-disciplinary issues involving hardware, drivers, and platform integration.
- Collaborate closely with IP architecture, design, and systems teams to convert validation requirements into robust test content ensuring confidence in functionality, performance, power, and production readiness.
Minimum Requirements
- Bachelor's degree in Science, Engineering, or related field with 4+ years experience in ASIC design, verification, validation, or integration (OR Master's with 3+ years OR PhD with 2+ years).
- Strong hands-on experience with Ethernet controllers, NIC architectures, or PCIe IPs.
- Proficiency in C/C++ programming, debugging, and bare-metal/Linux driver development.
- Experience with lab and debug tools such as Lauterbach TRACE32, oscilloscopes, protocol analyzers, and traffic generation equipment.
Ideal Candidate Profile
- Experienced in validating complex SoC features covering functional, performance, power, and system-level use cases.
- Comfortable working across hardware and software domains, showing deep understanding of embedded systems and hardware/software interactions.
- Familiarity with AI server interconnect protocols such as ESUN/UEC or UALink is preferred but not mandatory.