Sr Engineer, Design Verification
Renesas Electronics Corporation (company site, opens in a new tab)4–8 yrsBengaluruOn-siteDirect career pageEst. 12–22 LPA
Posted 3h ago
Your match
Against your primary resume
Log in to see your match score
Create a free account or log in to unlock your CV match score across:
- Role fit
- Experience
- Industry relevance
Reach people at Renesas Electronics Corporation
People at this company you can reach
Log in to see who works here
Create a free account or log in to see the people at Renesas Electronics Corporation you could write to:
- Recruiters & HR
- People in this function
- Work addresses
Protocol Intelligence
How competitive this role is
Competition
Background fit
Strictness
Log in to see why each signal reads the way it does.
Job description
Structured overview of role & requirements
About This Role
- Develop and maintain extendable verification testbenches for memory interface integrated circuits using System Verilog and UVM.
- Define and execute detailed verification plans targeting 100% coverage and verification completeness before tape-out.
- Collaborate closely with design teams for debugging, regression analysis, and silicon validation efforts.
Minimum Requirements
- 4-8 years experience in design/verification of complex integrated circuits.
- Proficiency in System Verilog and UVM for verification environment development.
- Experience with code coverage, functional coverage, assertions, and cover groups for verification completeness.
- Bachelor’s or Master’s degree in Electronics or Electrical Engineering.
Ideal Candidate Profile
- Experienced in verification of memory interface protocols such as DDR4, DDR5, LPDDR5, and DIMM is preferred.
- Ability to manage complex verification projects end-to-end independently.
- Strong skills in creating modular, reusable verification environments using high-level concepts like object orientation in System Verilog.