Staff Engineer, Design Verification - High-Speed Interface IP
Synopsys (company site, opens in a new tab)5–6 yrsNoidaOn-siteDirect career pageEst. 22–35 LPA
Posted 1d ago
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Job description
Structured overview of role & requirements
About This Role
- Develop and execute verification strategies, test plans, and environments for complex ASIC and high-speed digital IP designs involving PCI/PCIe and USB protocols.
- Take ownership of assigned verification areas from planning through closure, including debugging simulation failures and collaborating closely with RTL design engineers.
- Drive verification quality by analyzing coverage and functional correctness to ensure robust design delivery of high-speed interface technologies.
Minimum Requirements
- 5–6 years of relevant experience in ASIC/Digital Verification.
- Hands-on experience verifying high-speed protocols/interfaces, specifically PCI/PCIe and preferably USB.
- Experience developing and maintaining verification environments for complex digital designs.
- Position location: NCR (No remote eligibility).
Ideal Candidate Profile
- Experienced in methodical debugging of RTL and verification failures, able to dig into waveforms and logs to resolve complex problems.
- Ability to independently own verification activities while collaborating effectively with design and verification teams throughout development lifecycle.
- Demonstrated focus on functional coverage and verification quality over simply passing tests, indicating thoroughness and technical rigor.