Senior Engineer, Logic Equivalence CAD
Marvell Technology, Inc. (company site, opens in a new tab)2+ yrsBengaluruOn-siteDirect career pageEst. 10–18 LPA
Posted 20h ago
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Job description
Structured overview of role & requirements
About This Role
- Develop and maintain Equivalence Checking flows to ensure functional correctness across multiple Business Units' RTL-to-Gate and Gate-to-Gate transformations.
- Debug and resolve equivalence issues, contributing to functional ECO and low-power equivalence methodologies.
- Collaborate closely with synthesis and DFT teams for smooth flow integration and interface with EDA vendors for tool optimization.
Minimum Requirements
- Bachelor's or Master's degree in Electrical Engineering or Computer Science.
- 2+ years hands-on experience in Equivalence Checking and functional ECO flow development.
- Experience with Cadence Conformal or Synopsys Formality toolsets (experience with both is a plus).
- Proficiency in Tcl scripting and understanding of synthesis, low-power management, RTL coding basics, and DFT constraints relevant to equivalence checking.
Ideal Candidate Profile
- Experience working in multi-disciplinary teams including synthesis and DFT, indicating strong collaboration on RTL-to-Gate verification flows.
- Ability to innovate and solve complex design verification challenges in a semiconductor CAD environment.
- Familiarity with power intent, multiple power domains, and integration of equivalence checks within overall CAD platforms.