Senior Staff Design Verification Engineer SOC
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Job Description
Structured overview of role & requirementsAbout This Role
Develop and maintain testbenches, testcases, and checkers to verify SoC design behavior against specifications.
Debug simulation discrepancies and manage verification tasks independently while mentoring junior engineers.
Collaborate cross-functionally with specification and design teams to resolve bugs and contribute to DV flow and methodology improvements.
Minimum Requirements
Bachelor’s degree in Electrical/Computer Engineering, Computer Science, or related field.
8-10 years of experience in SoC verification.
Proficiency in SystemVerilog, UVM, and C for test writing; scripting skills in Python, Tcl/Tk, Perl.
Understanding of SoC interconnects and bus standards such as AXI, AHB, APB.
Ideal Candidate Profile
Experienced in advanced SoC verification environments with strong debugging and problem-solving skills.
Able to lead verification efforts independently and mentor junior team members while working in cross-functional teams.
Familiarity with CPU architectures (RISC-V, ARM, MIPS) and register description languages is preferred but not mandatory.