Staff Applications Engineer ( ASIC, Physical Design, TCL / Python )

Support customers in physical design implementation and closure using Synopsys tools, focusing on timing, power, area, congestion, and routing challenges at advanced nodes (5nm and below).

Develop and maintain TCL and Python automation scripts to streamline workflows and improve customer turnaround times.

Collaborate with customers and internal R&D to troubleshoot complex implementation issues, provide technical guidance, and influence product development based on real-world use cases.

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.

At least 5 years of hands-on experience in ASIC physical design, implementation, or CAD engineering.

Proficiency with RTL-to-GDS implementation flow tools such as Fusion Compiler or ICC2, and scripting in TCL and Python.

Working knowledge of advanced process nodes (7nm and below) and complementary EDA tools like Formality and PrimeTime is highly desired.

Experienced in handling complex timing closure, congestion, and power optimization challenges especially at advanced semiconductor nodes (5nm, 3nm).

Capable of direct customer engagement including senior engineers and managers with clear technical communication under tight schedules.

Proficient in leveraging AI-assisted workflows and automation to enhance productivity and solve implementation bottlenecks efficiently.