STAFF ENGINEER, ASIC VALIDATION

Own verification and validation of multi-processor SoC C designs including ASIC validation and silicon bring-up activities.

Perform end-to-end debug using tools like Metaware debugger on bring-up boards and validation platforms such as HAPS prototyping.

Leverage strong skills in C/C++, ARC processor verification, and protocol debugging (PCIE, LPDDR, ONFI, AXI) within firmware flows during debug activities.

Proven hands-on experience in SoC C verification, validation, and silicon bring-up processes.

Strong proficiency in C/C++ programming and ARC processor verification experience required.

Familiarity with Synopsys simulation and debug tools, and debugging on platforms like HAPS preferred.

Work Experience Required: Not explicitly mentioned in the JD.

Experienced individual contributor skilled in ASIC validation and product debug in complex multi-processor SoC environments.

Comfortable and proficient in using internal AI tools and advanced debug mechanisms in firmware and hardware integration contexts.

Demonstrates robust knowledge of SOC protocols (PCIE, LPDDR, ONFI, AXI) and end-to-end hardware bring-up and validation processes.