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Job Description
Structured overview of role & requirementsAbout This Role
Create and validate analog, digital, and mixed-signal circuit models for Lattice FPGAs ensuring accuracy and performance.
Lead and mentor circuit modeling engineers while collaborating closely with design, architecture, and internal model users to meet requirements.
Analyze simulation results and optimize models for performance, accuracy, and efficiency, and document processes for stakeholders.
Minimum Requirements
Bachelor's or Master's degree in Electrical Engineering.
5+ years of experience in circuit modeling and simulation.
Proficiency with circuit simulation tools such as SPICE, Verilog, VHDL, SystemVerilog.
Legal authorization to work in India and ability to pass background and reference checks.
Ideal Candidate Profile
Experienced in both analog and digital mixed-signal circuit modeling with strong skills in SystemVerilog and SystemC modeling.
Capable of providing technical leadership and mentorship within a specialized engineering team.
Comfortable working collaboratively with cross-functional design and architecture teams and responding to internal customer needs.