Principal Engineer. Virtual Prototype Modeling
Renesas Electronics CorporationMatch Score
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Job Description
Structured overview of role & requirementsAbout This Role
Develop SystemC/TLM2.0 based models for SoC IP blocks including processors, cache controllers, interconnects, peripherals, NPUs, and ISPs.
Verify models at IP and SoC levels and develop self-checking test suites using C/ARM assembly.
Support firmware and software teams by creating system level flows, methodologies, and ensuring effective use of virtual prototypes.
Minimum Requirements
15+ years of hardware engineering experience with MTech/BTech in Electrical Engineering or Computer Science.
Proficiency in C, C++, SystemC with experience in data structures, algorithms, and object-oriented programming.
Experience developing SystemC/TLM-based models for SoC virtual platforms and familiarity with virtual prototype tools (e.g., ARM Fast Models, Synopsys Virtualizer, Windriver SIMICS).
Knowledge of microprocessor, microcontroller, SoC architecture, bus protocols, embedded Linux, assembly language, debugging, and validation of virtual prototypes.
Ideal Candidate Profile
Senior expert with deep expertise in SoC virtual prototyping, SystemC modeling, and system-level verification.
Experienced in multi-team collaboration and quality processes across geographic locations for project execution and delivery.
Skilled in low-level embedded software development including OS porting, device drivers, and bare metal testing to bridge hardware and firmware development.