Senior Manager, Design Verification Engineering
Analog Devices, Inc.Match Score
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Job Description
Structured overview of role & requirementsAbout This Role
Lead end-to-end design verification for complex digital SoCs including microprocessor-based designs and AI/ML accelerators.
Formulate and drive verification strategies, methodologies, and team execution from planning through signoff ensuring functional correctness and coverage closure.
Collaborate cross-functionally with architecture, design, emulation, FPGA, firmware, and software teams to align verification efforts with product requirements and post-silicon validation.
Minimum Requirements
B.Tech or M.Tech degree.
12+ years of experience in digital pre-silicon verification with leadership roles in IP, subsystem, or SoC-level design verification.
Strong skills in Verilog/SystemVerilog, UVM-based testbench development, and advanced verification methodologies including formal and power-aware verification.
Experience with high-speed/low-speed interface protocols (e.g., I2C, SPI, Ethernet, UART, AXI/AHB, DMA) and processor-based systems (ARM, RISC-V, Tensilica).
Ideal Candidate Profile
Experienced leader able to drive complex SoC verification projects and lead multi-disciplinary teams across global locations.
Deep technical expertise in scalable DV environment architecture, verification closure, and innovative verification methodologies including formal and power-aware techniques.
Strong collaborator with proven ability to influence verification strategy across business units and actively engage in technical initiatives with a focus on next-generation Intelligence at the Edge products.