Senior/ Staff Design Automation Engineer, Scribe Layout Design Non-Array
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Protocol Intelligence
Data-driven signals on your job's competitivenessTier-1 brand plus mid-level 5+ years but niche EDA skills reduce general applicant density.
Highly specialized semiconductor EDA and layout automation skills limit industry transferability.
Requires specific EDA tool expertise, SKILL, Python, LLM automation and 5+ years, so filtering will be strict.
Job Description
Structured overview of role & requirementsAbout This Role
Design, layout, and verification of CMOS electrical test structures for device development, modeling, and fab process monitoring.
Develop and implement automation solutions using EDA tools, generative AI, and SKILL/SKILL++ for scalable layout design workflows.
Provide technical mentorship and collaborate with global engineering teams in India, Japan, and the US on physical layout, floor planning, and verification.
Minimum Requirements
5+ years of relevant design automation experience.
Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering or Electronics Engineering.
Proficiency in EDA tools and CAD flows, including deep knowledge of Python and experience with SKILL/SKILL++, Perl, Tcl.
Working knowledge of Linux and understanding of CMOS manufacturing, layout design rules, and layout verification processes.
Ideal Candidate Profile
Experienced in developing intelligent, scalable design automation using AI/LLM technologies and Model Context Protocol for productivity enhancement.
Demonstrates ability to innovate and improve automation flows, with a focus on patent disclosure and research contributions.
Capable of operating effectively within global, multi-cultural engineering teams and mentoring junior engineers.
