Lead Validation Engineer
GE Vernova (company site, opens in a new tab)6+ yrsHyderabadOn-siteDirect career pageEst. 12–20 LPA
Posted on 21 Sept
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Job description
Structured overview of role & requirements
About This Role
- Coordinate and own integration, validation, and debugging of embedded system software for Mark VIe platforms.
- Develop, automate, and execute system-level validation plans and test cases including environment setup and troubleshooting.
- Collaborate closely with architects, firmware developers, program management, and component teams to support product releases and roadmap improvements.
Minimum Requirements
- 6+ years of experience in testing and test script development, specifically in embedded testing.
- Experience with Bug Life Cycle management; Visual Studio TFS tool knowledge is a plus.
- Hands-on experience in test execution and development using Visual Studio (C#, SpecFlow, Gherkin).
- Not explicitly mentioned in the JD: degree requirement, notice period, or strict location restrictions.
Ideal Candidate Profile
- Experienced in embedded system validation with strong debugging and troubleshooting expertise at the platform level.
- Familiarity with control systems validation and industry communication protocols like MODBUS, Profibus, Profinet, FF, CAN, Ethernet.
- Able to work effectively in global, cross-functional teams involving hardware, software, and system test disciplines.