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Job Description
Structured overview of role & requirementsAbout This Role
Design and build FPGA-based SoC applications using C++ flow, including HLS cores and firmware, deploying on real hardware.
Drive regression and validation testing covering functional correctness, performance, quality of results, and timing.
Provide hands-on insights to influence feature prioritization and roadmap decisions collaboratively with compiler teams.
Minimum Requirements
8+ years of experience in FPGA/SoC design and software development in this domain.
Proficiency in firmware/embedded C++ development including drivers, RTOS/bare-metal, DMA/interrupts, and software engineering practices.
Experience with high-level synthesis tools like Vitis HLS, Catapult, or SmartHLS and FPGA/SoC system design (AXI, memory hierarchies, IP integration).
B.Tech/Master's degree or equivalent experience.
Ideal Candidate Profile
Experienced in embedded FPGA application development and silicon validation with strong hands-on technical skills in hardware/software co-design.
Comfortable working with Xilinx/AMD Vitis flow including SDK and bootgen processes, and testing Linux and standalone device drivers.
Able to operate effectively in ambiguous, fast-paced agile environments, with a strong test and quality mindset for complex toolchains.