Staff Engineer Formal(IOMMU-N)
SiFive (company site, opens in a new tab)7+ yrsBengaluruOn-siteDirect career pageEst. 28–45 LPA
Posted on 16 Sept
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Job description
Structured overview of role & requirements
About This Role
- Develop and implement formal verification plans for complex digital designs, including RISC-V processors and IP blocks designed in Chisel.
- Write, debug, and apply formal properties and assertions in Chisel/Scala to identify corner-case bugs and prove design correctness using formal verification tools.
- Collaborate with design engineers to review architectures, improve verification coverage and efficiency, and contribute to formal verification flow enhancements.
Minimum Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
- 7+ years of hands-on experience in formal verification of digital hardware designs.
- Proficiency in Scala programming and hands-on experience with Chisel hardware description language.
- Experience with formal verification methodologies, formal tools, and TCL scripting for automation.
Ideal Candidate Profile
- Deep expertise in formal verification specifically for RISC-V or similar digital hardware designs.
- Strong programming skills in Scala/Chisel and familiarity with assertion-based verification techniques.
- Experienced in collaboration with design teams to integrate verification feedback and improve process tools and methodologies.