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Niche semiconductor CAD role at a recognized brand in Bangalore yields moderate applicant competition.
Highly specialized semiconductor CAD and timing/power expertise limits transferability across industries.
Multiple mandatory domain-specific tools, semiconductor experience, and export-control eligibility increase shortlisting strictness.
Develop, maintain and enhance PrimeTime-STA & PrimePower-based power signoff flows in Marvell's M1DP CAD platform.
Enable and support In-Design Timing & Power flows for timing/power-aware optimization during physical implementation across multiple ASIC projects.
Collaborate with Physical Design and Front-End teams; develop automation scripts; interface with EDA vendors; support tapeout activities ensuring power & timing signoff closure.
6 to 10 years of hands-on experience in CAD flow development or power analysis in semiconductor industry (level-dependent).
Proven experience with Synopsys PrimeTime & PrimePower (gate-level and/or RTL-level power analysis).
B.E./B.Tech or M.E./M.Tech in Electrical Engineering, Electronics Engineering, Computer Science, or related field.
Proficiency in Tcl scripting; familiarity with UPF/CPF power intent and multi-voltage design methodologies.
Strong knowledge of timing concepts and advanced node timing effects including LVF, POCV & AOCV.
Experienced in power analysis concepts: dynamic power, leakage, glitch power, clock gating efficiency.
Analytical with experience debugging complex power analysis issues; able to collaborate with global teams.