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Job Description
Structured overview of role & requirementsAbout This Role
Develop and maintain advanced power estimation models and tools for GPU and SOC chip architectures.
Collaborate with architecture, design, synthesis, timing, circuit, and post-silicon teams to calibrate and correlate power models against measured silicon data.
Analyze chip configurations and process technology options to optimize power/performance and drive Performance/Watt improvements.
Minimum Requirements
B.Tech./M.Tech degree required.
At least 2 years of experience in power/performance estimation and optimization.
Strong knowledge of transistor-level leakage/dynamic power characteristics and low power design techniques (multi VT, clock gating, power gating, DVFS).
Proficient programming skills in Python and object-oriented design.
Ideal Candidate Profile
Experienced in power estimation flows, algorithms, and EDA tools relevant to chip design.
Able to work cross-functionally with various chip design and validation teams to impact product power optimization.
Familiarity with hardware lab power measurement setups and hands-on debugging of board-level power issues is a plus.