Chip Power Estimation Engineer
NVIDIA Corporation (company site, opens in a new tab)2+ yrsBengaluruOn-siteDirect career pageEst. 18–35 LPA
Posted on 11 Sept
Reach people at NVIDIA Corporation
People at this company you can reach
Log in to see who works here
Create a free account or log in to see the people at NVIDIA Corporation you could write to:
- Recruiters & HR
- People in this function
- Work addresses
Your match
Against your primary resume
Log in to see your match score
Create a free account or log in to unlock your CV match score across:
- Role fit
- Experience
- Industry relevance
Protocol Intelligence
How competitive this role is
Competition
Background fit
Strictness
Log in to see why each signal reads the way it does.
Job description
Structured overview of role & requirements
About This Role
- Develop and maintain advanced power estimation models and tools for GPU and SOC chip architectures.
- Collaborate with architecture, design, synthesis, timing, circuit, and post-silicon teams to calibrate and correlate power models against measured silicon data.
- Analyze chip configurations and process technology options to optimize power/performance and drive Performance/Watt improvements.
Minimum Requirements
- B.Tech./M.Tech degree required.
- At least 2 years of experience in power/performance estimation and optimization.
- Strong knowledge of transistor-level leakage/dynamic power characteristics and low power design techniques (multi VT, clock gating, power gating, DVFS).
- Proficient programming skills in Python and object-oriented design.
Ideal Candidate Profile
- Experienced in power estimation flows, algorithms, and EDA tools relevant to chip design.
- Able to work cross-functionally with various chip design and validation teams to impact product power optimization.
- Familiarity with hardware lab power measurement setups and hands-on debugging of board-level power issues is a plus.