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Tier-1 employer, metro location, and mid-level experience create high applicant competition despite niche specialization.
Role requires specialized semiconductor verification and IP integration skills, limiting cross-industry transferability.
Mandates Master's degree, 3–7 years, and specific verification tools (UVM/VCS/Verdi), increasing filtering strictness.
Integrate and verify functional models of graphics logic components including 3D graphics and media to ensure designs meet specifications.
Define verification infrastructure and build IP test environments including checkers, monitors, and test infrastructure.
Collaborate with cluster owners to integrate their code into media IP and validate IP handoff to SoC.
Master's degree in Electronics, Computer Science, Embedded Systems or related field.
3-7 years of hands-on experience in pre-silicon simulation model builds, VLSI design, or testing.
Expertise in verification tools and methodologies including Verdi, VCS, UVM/OVM and scripting languages such as Python, Perl, or Ruby.
On-site presence required in Bangalore, India.
Experienced in designing and optimizing test environments for complex IP/SoC including stress stimuli and trackers.
Skilled in diagnosing problems and driving sustainable solutions in IP validation processes.
Familiar with digital design fundamentals and able to work collaboratively across technical teams to meet high-quality deliverables.