Principal Engineer SoC Design Verification
GlobalFoundries (company site, opens in a new tab)15+ yrsBengaluruOn-siteDirect career pageEst. 55–90 LPA
Posted on 9 Sept
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Job description
Structured overview of role & requirements
About This Role
- Lead verification strategy, methodology, planning, execution, and signoff for complex Smart Analog & Sensor SoCs at both subsystem and full-chip levels.
- Own verification of processor, accelerator, memory, connectivity, security, safety, peripherals, and sensor data processing pipelines to ensure first-silicon success.
- Develop scalable UVM-based verification environments and frameworks; coordinate cross-functional teams and manage verification closure and signoff readiness.
Minimum Requirements
- Bachelor's degree minimum with 15+ years of relevant industry experience in SoC design verification.
- Extensive experience in UVM-based verification and verifying complex SoCs.
- Proven ability to build reusable verification environments and define/track coverage metrics.
- Work Experience Required: 15+ years relevant industry experience.
Ideal Candidate Profile
- Experienced in defining and driving SoC-scale verification strategies including test plans and coverage methodologies.
- Skilled in technical leadership and mentoring senior verification engineers; capable of leading globally distributed teams.
- Familiar with emulation, prototyping, safety/security verification, and performance verification to meet advanced SoC requirements.