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Medium — strong employer brand and metro location, but niche CAD skillset reduces applicant density.
High — ASIC/CAD and VLSI methodology expertise is domain-specialized and not easily transferable.
Medium — requires specific C++/CAD tool experience and hardware design exposure despite a low years floor.
Own validation of clocking methodology solutions for hardware clocking designs across multiple NVIDIA product lines.
Develop robust validation strategies, automation, quality checks, debug infrastructure, bug fixes, and workflow productization for clocking methodologies.
Build and maintain scalable CAD tools and automation using C++, Python, Perl, Tcl integrated with NVIDIA's frameworks, collaborating with cross-functional engineering teams worldwide.
Bachelor's or Master's degree in Computer Science, Electrical Engineering, or related field or equivalent industry experience.
1+ years experience with digital logic design and computer architecture.
Proficient in C/C++ and scripting languages including Python, Perl, Tcl.
Experience with CAD tool development, engineering automation, or software infrastructure development.
Engineer with software development expertise in building scalable CAD tools and automation for hardware engineering teams.
Experienced in cross-disciplinary collaboration with design, verification, architecture, methodology, and QA teams across multiple geographies.
Familiarity or exposure to VLSI design flows, clocking methodologies, or physical design is a plus for success.