Principal Engineer - ASIC DV
Micron Technology, Inc. (company site, opens in a new tab)10+ yrsBengaluruOn-siteDirect career pageEst. 35–65 LPA
Posted on 8 Sept
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Job description
Structured overview of role & requirements
About This Role
- Lead and oversee IP/Block and Subsystem level verification from test plan creation through sign-off, ensuring first-pass success.
- Develop and manage SystemVerilog/UVM testbenches and environments for ASIC IP/Block/Subsytem verification.
- Mentor and lead a team of verification engineers while collaborating globally on technical initiatives.
Minimum Requirements
- 10+ years experience with M.S./M.Tech or BS/BE in Electronics.
- Expertise in IP/Block/Subsystem level verification including test plan and UVM environment development.
- Experience with AMBA protocols (AXI/AHB), PCIe, NVMe, DDR protocols and controllers.
- Proficient in RTL debugging, assertions, functional and code coverage analysis, and SystemVerilog/Verilog languages.
Ideal Candidate Profile
- Proven experience leading teams of verification engineers (preferably 5+ members) and driving IP/Block verification to completion.
- Strong technical expertise in ASIC verification with hands-on knowledge of PCIe, NVMe, DDR controllers.
- Comfortable working in cross-functional, multinational teams aligning on verification strategy and execution.