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Tier-1 semiconductor brand and Bengaluru metro location increase applicant density despite niche verification skill requirements.
Highly specialized semiconductor verification skills (UVM/SystemVerilog, NoC, formal) limit cross-industry transferability.
Explicit 8+ years and mandatory UVM/SystemVerilog, NoC, formal, and power-aware verification make filters strict.
Lead pre-silicon verification for complex SoC or subsystem designs from planning to closure.
Define and implement UVM-based testbenches, verification strategies, and scalable flows targeting functional and code coverage closure.
Collaborate cross-functionally with emulation, FPGA, firmware teams, and drive advanced verification techniques including formal verification and NoC/interconnect validation.
B.Tech or M.Tech degree mandatory.
8+ years of experience in digital pre-silicon verification required.
Strong expertise with Verilog/SystemVerilog, UVM methodologies, and SoC/subsystem architectures.
Willingness to travel up to 10%; applicants may require export licensing approval depending on citizenship status.
Experienced in architecting and leading digital verification for large integrated products with measurable coverage closure success.
Proficient in power-aware verification (UPF), formal verification, and system-level use case validation.
Comfortable working across global teams and driving innovation in verification methodologies within a high-tech semiconductor environment.