Staff Engineer Design
Infineon Technologies AG (company site, opens in a new tab)BengaluruOn-siteDirect career pageEst. 30–50 LPA
Posted on 2 Sept
Reach people at Infineon Technologies AG
People at this company you can reach
Log in to see who works here
Create a free account or log in to see the people at Infineon Technologies AG you could write to:
- Recruiters & HR
- People in this function
- Work addresses
Your match
Against your primary resume
Log in to see your match score
Create a free account or log in to unlock your CV match score across:
- Role fit
- Experience
- Industry relevance
Protocol Intelligence
How competitive this role is
Competition
Background fit
Strictness
Log in to see why each signal reads the way it does.
Job description
Structured overview of role & requirements
About This Role
- Develop and maintain Real Number Models (RNM) for Analog/Mixed-Signal IP using SystemVerilog and svreal.
- Build and lead FPGA-based prototypes for SoC and system-level validation including pre- and post-silicon firmware validation.
- Create Python automation frameworks for simulation, FPGA flows, and CI/CD while driving FPGA prototyping methodology enhancements and mentoring teams.
Minimum Requirements
- Bachelor's, Master's, or PhD in Microelectronics, Electrical Engineering, Computer Engineering, or related discipline.
- Expertise in ASIC/FPGA design, SystemVerilog, FPGA prototyping, and Python automation.
- Knowledge of digital design, FPGA architectures, semiconductor systems, and embedded technologies.
- Work experience required: Not explicitly mentioned in the JD.
Ideal Candidate Profile
- Experienced in FPGA modeling architecture and firmware validation on FPGA platforms with debugging skills using Vivado ILA and SignalTap.
- Strong interdisciplinary collaboration skills working across digital, analog, firmware, and embedded engineering teams globally.
- Able to drive faster product validation and accelerate time-to-market through technical leadership and process improvements.