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Tier-1 brand, mid-level 5+ years requirement, and metro Bangalore increase applicant competition.
Requires specialized physical implementation and EDA expertise, making skills poorly transferable across industries.
Mandatory 5+ years Synthesis experience, EDA tool expertise, and scripting create strict technical filters.
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Solve complex Performance, Power, Area (PPA) challenges using Synopsys’ implementation technologies including AI/ML and Physical Synthesis RTL-GDS.
Develop, debug, and optimize synthesis and physical implementation methodologies, driving customer tool adoption and migration for best-in-class results.
Collaborate closely with R&D to translate customer technical feedback into product enhancements and benchmark Synopsys solutions against competitors to showcase superior outcomes.
Minimum 5+ years of experience in synthesis with strong debugging skills and low power understanding.
Proficiency in synthesis and formal verification tools and flows is highly advantageous.
Advanced scripting skills in TCL, Unix, Perl for automation and debugging.
Work Experience Required: At least 5+ years in relevant domain. Notice period: Not explicitly mentioned in the JD.
Experienced in tackling complex semiconductor implementation challenges focused on synthesis and physical design flows targeting optimized PPA metrics.
Strong technical communicator capable of interacting with both customers and internal R&D teams to translate needs into actionable solutions.
Operates effectively in dynamic, cross-functional environments emphasizing customer advocacy and continuous product improvement.