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Tier-1 brand and Bangalore location increase competition, but niche ASIC/EDA skill requirements reduce applicant density.
Requires specialized ASIC/EDA and Perforce experience, limiting transferability across industries.
Explicit ASIC/EDA, Perforce, and scripting requirements make shortlisting highly selective.
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Own and maintain Continuous Integration (CI) pipelines for front-end ASIC build areas including Lint, Synthesis, Equivalence Checking, and Simulation.
Develop, build, and maintain automation scripts (Python, Tcl, Shell) to integrate EDA tools (Synopsys, Cadence) into automated build pipelines.
Manage Perforce integration to support multi-IP branch/stream strategies, hardware build drops, and release labeling while supporting RTL and verification engineers to resolve flow issues.
2+ years of industry experience in ASIC/SoC front-end integration, CAD, or EDA flow automation.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
Strong hands-on experience with Perforce (P4 / Helix Core) including managing streams, workspace specs, changelists, and labels in a hardware build environment.
Proficiency in Python, Tcl, and Bash/Shell scripting along with practical experience in front-end ASIC EDA tools (e.g., SpyGlass, Build Compiler, or Xcelium).
Experienced in automating Perforce workflows including writing custom Python scripts and pre-/post-submit triggers to enforce code check-in policies.
Able to develop automated regression reporting tools, pipeline health dashboards, and integrate notifications with Slack/Teams.
Comfortable diagnosing and fixing front-end build and flow issues under project deadlines with a primary focus on front-end ASIC integration environments.