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Niche semiconductor emulation role and seniority limit candidate pool despite strong AMD brand.
Highly specialized ASIC/FPGA emulation skills are not easily transferable across industries.
Explicit 13+ years, domain expertise, and mandatory protocol/verification skills enforce strict filtering.
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Lead prototyping of SoC designs on emulators/FPGAs (Palladium, ZeBu, Veloce, Protium) and execute pre-silicon tests.
Collaborate with SoC DV and emulation infrastructure teams to integrate design, programming, and infrastructure components for delivery of qualified emulation models to pre-silicon validation.
Mentor and guide junior engineers while handling hands-on emulation model development and protocol feature bring-ups.
13+ years of experience in ASIC Design Verification and/or FPGA/emulator prototyping.
B.E/B.Tech/M.E/M.Tech in Electrical/Electronics Engineering.
Experience with ASIC Design Flow, SoC architecture, and protocols like DDR/LPDDR, PCIe/NVMe, USB2/3/4, Gigabit Ethernet, SATA.
Strong skills in Verilog, SystemVerilog, PLI interface, C/C++, and scripting languages (Perl/shell).
Deep expertise in building emulation models from scratch with excellent functional simulation debug skills.
Experienced working in cross-functional teams combining design verification and emulation infrastructure.
Ability to lead complex technical efforts and mentor junior team members effectively.