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Tier-1 employer and mid-level Bangalore role, but niche AMS verification skills limit applicant pool.
High because analog mixed-signal verification skills are highly domain-specific and less transferable across industries.
High due to explicit 4–8 years requirement and mandatory SystemVerilog/Verilog-AMS and verification experience.
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Own mixed signal verification including behavioral modeling of analog blocks such as switching converters and LDOs using SV/Verilog/Verilog-AMS/VerilogA.
Responsible for real model creation and validation targeting power management IPs and SOCs verification.
Develop verification plans, environments, and PSL/SV assertions with an emphasis on scripting and automation in a process-oriented setup.
4 to 8 years of relevant verification experience.
Strong knowledge of mixed signal verification fundamentals and verification planning.
Experience in behavioral modeling of analog components using SV/Verilog/Verilog-AMS/VerilogA.
Bachelor’s or Master’s degree in Engineering (B.Tech/B.E/M.Tech/M.E).
Experienced in power management IPs and SoCs verification or similar mixed signal SoC verification environments.
Demonstrates strong expertise in verification environment development and assertions (PSL/SV).
Comfortable working collaboratively across multiple sites and passionate about scripting and automation.