Back
Tier-1 employer and metro location increase applicant density despite niche verification requirements.
Highly specialized semiconductor IP verification skills limit cross-industry transferability.
Mandatory 8+ years, domain-specific UVM/SystemVerilog expertise and IP verification experience create strict filters.
Login to See Your Match Score
Create a free account or log in to unlock your CV match score across:
Own and develop DV test benches and verification collateral including checkers, trackers, scoreboards, assertions, and functional coverage for Infrastructure IPs like DDRSS, Memory Controllers in SoCs.
Plan and implement IP/Cluster/Formal verification flows for infrastructure IPs and coordinate with design and SoC teams throughout the IP development cycle.
Perform debugging of regression signatures, post-silicon issues, and support quality sign off with necessary documentation; collaborate with SoC performance modeling on latency and bandwidth analysis.
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 4+ years experience OR Master's with 3+ years OR PhD with 2+ years in Hardware Engineering or related verification roles.
Strong expertise in UVM-based verification, ARM bus protocols, SystemVerilog, and infrastructure IP verification such as DDRSS and Memory Controllers.
Experience in developing monitors, scoreboards, sequencers using scripting languages and verification methodologies; strong debugging and problem-solving skills.
Work Experience Required: 8+ years of experience in IP verification or related; proficiency in scripting (Python or Perl) and optionally C/C++/SystemC for performance modeling.
Experienced Verification Architect/Engineer with deep knowledge of Infrastructure IP verification in SoC environments targeting smartphones, tablets, and similar products.
Proficient in coordinating cross-functional teams including system architects, design, emulation, silicon bring-up, and software teams to ensure quality and performance goals.
Familiarity with low power design verification, automotive safety verification (ASIL), and silicon debug tools adds strategic advantage.