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Niche compiler+ML specialization but metro locations and attractive senior title raise applicant competition.
Highly specialized compiler and accelerator experience limits cross-industry transferability.
Extensive mandatory LLVM/MLIR, IREE, compiler, NPU, and C++ expertise required.
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Architect and develop AI/ML compiler and runtime software for RISC-V based IP, NPU, and SoC platforms focused on edge AI workloads.
Design and maintain IREE-based compiler flows including MLIR dialects, passes, code generation, and runtime integration to enable efficient AI model execution.
Collaborate with architecture, hardware, firmware, and product teams for silicon-to-software lifecycle execution including debugging, validation, and performance optimizations.
3-12 years of hands-on software engineering experience in compiler, runtime, embedded software, or AI/ML systems.
Strong experience with IREE, LLVM, MLIR compiler infrastructure including developing compiler passes, dialects, and backend integration.
Proficient in C/C++ and Python scripting in Linux development environment including cross-compilation, debugging, and profiling.
Work Experience Required: 3-12 years
Experience working in AI compiler/runtime stacks focusing on edge AI or accelerator-backed inference and custom hardware support.
Technical leadership ability to mentor engineers and manage complex software modules across cross-functional teams.
Exposure to RISC-V or other accelerator instruction sets, FPGA platforms, silicon bring-up, and AI model optimization for constrained edge devices.