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Tier-1 employer and Bangalore location increase competition, but niche PCIe verification skills limit applicant pool.
Specialized ASIC verification skills (UVM, SystemVerilog, PCIe) are highly domain-specific and not easily transferable.
Mandatory UVM/SystemVerilog, PCIe/IP verification expertise and explicit 2+ years requirement enforce strict shortlisting.
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Own verification of ASIC design, architecture, and micro-architecture of PCI Express controllers at IP and sub-system levels.
Develop test plans, reusable verification components (BFMs, monitors, checkers, scoreboards) using UVM and coverage-driven methodologies.
Collaborate with architects, designers, and silicon verification teams to ensure design correctness.
B.Tech. or M.Tech. degree required.
2+ years experience in verification at Unit/Sub-system/SoC level using Verilog and SystemVerilog.
Experience with verification of IP or interconnect protocols such as PCI Express, USB, or SATA.
Experience with DV methodologies like UVM/VMM and industry standard verification tools. Notice period: Not explicitly mentioned in the JD.
Strong expertise with PCI Express protocol (Gen3 and above).
Skilled in SystemVerilog testbench development and scripting languages like Perl or Python.
Experienced in debugging, analytical thinking, and working effectively within multi-disciplinary teams.