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Strong employer brand and metro location balanced by niche UVM/SystemVerilog verification skillset reduce applicant density.
Role requires specialized SoC IP verification skills, limiting transferability across industries.
Mandatory 8+ years plus specific UVM/SystemVerilog, ARM protocol and IP verification requirements make filters strict.
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Plan and implement verification flows for next-generation Infrastructure IPs such as DDRSS and Memory Controllers within SoC products.
Own the DV test bench and verification collateral including checkers, trackers, scoreboards, assertions, and functional coverage.
Coordinate with design, SoC, emulation, and system architect teams on verification, failure debug, coverage closure, regression signature analysis, and quality sign-off.
Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, or related field with 3+ years of hardware verification or related experience OR Master’s degree with 2+ years OR PhD with 1+ year.
8 years of experience in IP verification or related area explicitly mentioned.
Expertise in UVM based verification and knowledge of ARM bus protocols and SoC system architecture.
Experience with scripting languages (Python or Perl) and verification tools such as Certitude, VC Formal, and VPlan.
Experienced in verification ownership for complex SoC infrastructure IPs, especially DDRSS and Memory Controllers.
Strong problem-solving and debugging skills with proven ability to lead cross-functional coordination for silicon bring-up and post-silicon debug.
Demonstrated proficiency in using UVM, System Verilog, and scripting to develop testbenches and automation tools for comprehensive verification coverage.