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Tier-1 brand, mid-level experience, metro location, but niche GPU verification reduces applicant pool.
Specialized semiconductor verification skills are less transferable across industries.
Explicit 5+ years requirement and mandatory UVM/SystemVerilog verification expertise.
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Own the development and execution of GPU 3-D graphics hardware functional verification including DV environment strategy, test plan ownership, and RTL debugging to achieve signoff quality.
Collaborate with global architecture, design, and systems teams and engage with EDA vendors to adopt innovative verification methodologies.
Drive full verification lifecycle activities including UVM/SV test bench development, subsystem level workload analysis, emulation, formal verification, power aware and gate level simulations, and automation scripting.
Bachelor's degree in Electrical/Electronics/Computer Science/Engineering or related field (Master's or PhD with less experience also acceptable).
Minimum 5 years of design verification experience.
Strong knowledge of UVM based System Verilog test benches.
Education: BE/ME/M.Sc. in Electrical, Electronics, VLSI, Microelectronics, or equivalent from reputed universities.
Experienced in GPU or 3D graphics hardware pipeline verification and understanding of GPU hardware blocks and data paths.
Capable of independently owning DV environment development and test plan execution with demonstrated debugging skills.
Familiar with formal verification tools and complex verification methodologies including constrained random testing, emulation, power aware simulations, and automation scripting.