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Tier-1 semiconductor employer and metro location increase competition, though niche RTL/silicon skillset moderates density.
Role requires semiconductor RTL and silicon-validation expertise, making cross-industry transitions difficult.
Requires niche RTL, silicon bring-up and test-pattern experience, making technical screening moderately strict.
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Develop, debug, and optimize functional test patterns for semiconductor and SoC products.
Troubleshoot RTL simulation issues and support silicon bring-up and validation teams for successful pattern execution on silicon.
Develop automation scripts to enhance pattern generation, execution, and debugging efficiency through collaboration with multiple engineering teams.
Experience in developing and maintaining functional test patterns based on design specifications.
Proficient in debugging and analyzing RTL simulation failures with design and verification teams.
Work Experience Required: Not explicitly mentioned in the JD.
Not explicitly mentioned: specific degree requirements, notice period, or location constraints.
Strong background in RTL simulation, silicon validation, and test engineering collaboration.
Experienced in automation development for test pattern generation and execution.
Capable of analyzing silicon failures and coordinating across Design, Validation, Product Engineering, and Test Engineering teams.