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Tier-1 brand, mid-level experience, metro location, and generic title increase candidate competition.
Specialized verification and VIP skills limit transferability, requiring domain-specific semiconductor verification experience.
Explicit 3–5 years plus mandatory SV/UVM, VIP, C/C++ and protocol experience makes filters highly stringent.
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Design, develop, verify, and deploy Verification IP (VIP) for layered protocols such as UCIe, PCIe, CXL, and Ethernet.
Create test environments using SystemVerilog/UVM and perform strong debug activities as part of functional verification.
Collaborate cross-functionally and interact closely with customers to adapt quickly to new technologies and protocols.
3 to 5 years of domain experience in functional verification and VIP development.
Proficiency in SystemVerilog/UVM for test environment creation and strong debugging skills.
Hands-on knowledge of C/C++ and scripting languages.
Bachelor’s or Master’s degree in Electrical/Electronics Engineering (BE/BTech/ME/MS/MTech).
Experienced in working on layered protocols such as UCIe, PCIe, CXL, and Ethernet with prior VIP usage and development experience viewed as plus.
Operates independently with strong analytical skills and ability to quickly adapt to new technologies in a fast-paced environment.
Effective communicator capable of cross-functional collaboration and customer interaction.