Back
Tier-1 brand, mid-level Bangalore role with multiple in-demand DV skills increases applicant competition.
Highly specialized semiconductor DV skills limit cross-industry transferability.
Explicit 5+ years plus mandatory deep DV, UVM/SystemVerilog, formal and low-power skills create strict filters.
Login to See Your Match Score
Create a free account or log in to unlock your CV match score across:
Define and execute end-to-end verification strategy for multiple SoC testchips, ensuring on-time delivery and quality signoff.
Lead development of reusable verification environments, tools, and complex testplans, including simulation and formal methodologies.
Collaborate cross-functionally with architecture, design, physical design, and post-silicon teams to unblock issues and maintain high-quality delivery.
5+ years of experience in design verification with SoC and subsystem-level expertise.
BS/MS in Electrical Engineering, Computer Science, or related field.
Proficiency in SystemVerilog/UVM, C/C++, Python, formal verification, low-power verification, and EDA tools.
Working knowledge of RTL, physical design constraints, and tool flows; comfortable with AI-assisted verification workflows.
Experienced in driving functional signoffs, coverage closure, and GLS signoff for multiple critical verification blocks.
Capable of cross-disciplinary technical collaboration and taking ownership beyond core verification tasks.
Familiar with defining technical standards and mentoring junior engineers to elevate team execution quality.