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Senior role at a known Tier-1 firm in Bangalore with niche skills yields moderate applicant competition.
Highly specialized ASIC/FPGA prototyping expertise limits cross-industry transferability.
Explicit 8–15 years plus mandatory FPGA/emulation, Python, and hardware-debug skills make filters highly selective.
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Own the setup, environment configuration, and stabilization of advanced FPGA prototyping and emulation platforms during early project bring-up.
Lead triage and debugging for complex system-level failures across hardware, FPGA/emulator configuration, and early boot-code.
Develop automation and monitoring tools to maximize reliability and throughput of emulation and prototyping infrastructure, and directly support firmware engineering teams by breaking execution barriers.
8–15 years of experience in pre-silicon development, hardware verification, or platform bring-up.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science.
Proven experience with large-scale FPGA prototyping platforms and hardware emulation platforms (e.g., Synopsys HAPS, Cadence Palladium).
Advanced Python scripting skills and strong debugging skills using JTAG, protocol analyzers, or equivalent tools.
Demonstrates broad systems-level knowledge bridging firmware, silicon design, and hardware validation.
Experienced in hardware/software co-verification and high-density FPGA deployments functioning at the intersection of hardware and firmware.
Skilled at developing automated infrastructure and tools to support high-throughput FPGA/emulation platform environments and global resource optimization.