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Tier-1 semiconductor brand but highly specialized senior role reduces general applicant density.
Highly specialized SoC verification skills limit cross-industry transferability.
Explicit 12+ years requirement and extensive mandatory verification skills make screening highly strict.
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Lead end-to-end design verification for complex digital SoCs and subsystems, from planning to signoff.
Define and implement verification strategies, architectures, methodologies, and scalable UVM-based testbenches for large integrated products.
Collaborate cross-functionally with architecture, design, emulation, FPGA, firmware, and software teams to ensure comprehensive pre-silicon validation and functional coverage closure.
Bachelor's (B.Tech) or Master's (M.Tech) degree required.
12+ years of experience in digital pre-silicon verification with leadership in IP, subsystem, or SoC-level design verification.
Strong expertise in Verilog/SystemVerilog, UVM-based testbench development, functional/code coverage, and SoC/subsystem architectural knowledge.
Willingness to travel up to 10%; work shift type is 1st Shift/Days.
Experienced leader in verification with proven ability to drive large product verification execution and team mentorship.
Deep technical expertise with SoC architectures including processors (ARM, RISC-V), AI/ML accelerators, interconnects, and advanced verification methodologies (formal, power-aware, emulation).
Comfortable working cross-functionally across global teams to innovate verification strategies and ensure robust pre-silicon readiness.