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Tier-1 brand, metro location, and mid-level Lead title increase applicant density despite niche SoC specialization.
Role requires specialized pre-silicon SoC and SystemC expertise, limiting cross-industry transferability.
Explicit 5+ years and mandatory niche SystemC/SoC/boot/RTL skills make filters highly strict.
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Own end-to-end development and integration of Virtual and Hybrid Platforms from ROM boot through OS bring-up and stability, enabling early software development ahead of silicon.
Lead debugging and resolution of complex HW/SW system issues using waveform analysis, GDB, JTAG, and co-debug methodologies to ensure platform health.
Drive platform performance optimization, multi-threading synchronization, deadlock analysis, and apply AI-assisted tools to enhance development and debugging workflows.
5+ years software development experience with significant depth in pre-silicon or SoC platform environments.
Strong proficiency in C++, SystemC, and TLM 2.0, with hands-on experience developing and integrating SoC Virtual and Hybrid Platforms.
Experience with Linux and/or Android bring-up including boot flow debugging and kernel stability analysis.
Skilled in software debugging including waveform-based and HW/SW co-debug across complex systems.
Experienced at the hardware/software boundary with knowledge of SoC architecture and system-level design.
Comfortable working cross-functionally with architecture, RTL, and firmware teams as a technical peer influencing platform evolution.
Proficient with concurrent and multi-threaded software challenges including deadlock analysis, and ready to lead ownership and mentorship responsibilities.