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Tier‑1 brand and metro location raise competition despite niche ATE/J750 skills.
Specialized semiconductor ATE, FPGA/SoC and low-level firmware skills limit cross-industry transferability.
Mandatory ATE/J750 experience and low-level firmware/C skills create strict technical filters.
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Develop and deploy tests on silicon to detect manufacturing defects in targeted FPGA/SoC IPs.
Collaborate with silicon design, verification, process, yield enhancement, and test engineers to ensure high-quality new product deployment with minimal time to market.
Gain deep understanding of FPGA/SoC architectures, logic verification at full chip level, DFT/testability hooks, and test deployment in ATE/tester setups.
1 - 3 years of experience working on ATE testers, preferably J750 tester.
Bachelor's or Master's degree in Electronics Engineering or Electrical Engineering (B-Tech or M-Tech).
Hands-on experience testing and debugging silicon components such as FPGA, ASIC, or test chips.
Proficient programming skills in C and C++/Java, with strong expertise in low-level C/assembly programming.
Experienced in firmware development on micro-controllers or ARM architectures.
Able to understand silicon manufacturing issues and related design methodologies.
Capable of working collaboratively across multiple engineering disciplines to support quality and yield in product deployment.