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Niche ML+ASIC skillset reduces pool, but mid-level role, metro Bangalore and strong brand increase competition.
Requires niche ASIC/EDA and ML expertise, limiting cross-industry transferability.
Explicit 5-year requirement plus mandatory ML software and EDA tool experience enforces strict shortlisting.
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Develop and prototype AI/ML-driven automation solutions to improve ASIC design and implementation flows focused on power, performance, area, and verification quality for SoC and IP development.
Collaborate closely with Architecture, IP design, SoC Design, Verification, Implementation, and Design Enablement teams across multiple sites to integrate state-of-the-art AI/ML techniques into VLSI CAD software and workflows.
Engage with academic AI/ML research communities and leverage AI/ML methods such as GenAI, Reinforcement Learning, Graph Neural Networks, and Convolutional Networks to drive digital transformation of design processes for advanced node SoC technologies.
Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, Computer Engineering, or related field with strong software development background.
Minimum 5 years of experience in complex software development projects with hands-on programming skills in Python and C++.
Experience with Unix/Linux environments, version control systems (Git, BitBucket), and software development/debugging tools.
Strong AI/ML expertise explicitly including knowledge or experience applying AI/ML to VLSI CAD or related domains.
Experienced in developing and integrating AI/ML solutions specifically for VLSI design automation or EDA tool development contexts.
Proficient in software engineering practices within Unix/Linux environments, and capable of driving automation workflows using CI/CD and tools like Jenkins, Git, and Make.
Able to bridge academic AI/ML research with practical ASIC design challenges, collaborating effectively with cross-functional teams including architects, IP and SoC designers, and verification teams.