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Niche senior semiconductor verification role in Bangalore reduces applicant pool, lowering competition.
Highly specialized SoC/IP verification skills limit cross-industry transferability.
Requires 10+ years plus mandatory DDR, SystemVerilog, UVM, and VIP/tool expertise.
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Own verification of DDR4/DDR5 memory controllers and AXI input interfaces ensuring protocol compliance, data integrity, and performance.
Develop and maintain SystemVerilog UVM-based verification environments including testbenches, testcases, scoreboards, assertions, and coverage analysis.
Collaborate with design, post-silicon, and firmware teams to debug RTL and functional/timing issues and mentor verification engineers on best practices.
Bachelor's or Master's degree in Electronics, Electrical, or Computer Engineering.
10+ years of experience in SoC or IP-level verification, preferably with memory subsystems.
Strong knowledge of DDR protocol (JEDEC), SystemVerilog, UVM methodology, and simulation tools such as Synopsys VCS, Cadence Xcelium, or Mentor Questa.
Travel requirement: 0%-25%.
Experienced with memory controller architecture and timing parameters along with AXI protocol integration.
Proven ability to lead verification efforts independently and improve debug efficiency using automation and AI-assisted workflows.
Skilled collaborator across multi-functional teams including design, validation, and firmware to achieve verification goals.