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Tier-1 brand and metro location increase applicant density despite niche semiconductor power specialization.
Role requires deep semiconductor power, transistor-level and low-power design expertise, limiting cross-industry transferability.
Mandatory 2+ years in chip power/performance estimation, VLSI fundamentals, and programming creates strict shortlisting filters.
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Develop and architect advanced power estimation models and tools for NVIDIA’s GPUs and SOCs focusing on chip and board power under product-driven use cases.
Correlate and calibrate these power models with measured silicon data to optimize power/performance configurations and process technology options.
Collaborate with cross-functional teams including architecture, design, synthesis, timing, circuit, and post-silicon groups to enhance power estimation accuracy and contribute to performance/watt improvements.
Bachelor’s (B.Tech.) or Master’s degree (M.Tech.) in a relevant field.
Minimum 2 years of experience in power/performance estimation and optimization techniques.
Strong understanding of transistor-level leakage/dynamic power characteristics and low power design techniques (multi VT, clock gating, power gating, DVFS).
Proficient programming skills in Python and object-oriented programming and design.
Experienced in developing power models within high-complexity semiconductor environments, especially GPU or SoC power estimation.
Comfortable working across multiple teams and integrating architectural, circuit-level, and silicon measurement data.
Familiarity with lab power measurement equipment and power analysis EDA tools (e.g., PTPX, EPS) is an advantage but not mandatory.